07-164

To:         J3
From:       Dick Hendrickson
Subject:    Co-arrays and processor dependent order
Date: 2007 February 09
References: J3/07-007, 06-342, 06-278, 06-279

This is a re-submittal of 06-342 which was deferred at meeting
178.

These comments are gleaned from 06-278 and 06-279 which were
deferred at meeting 177.

Page 73:20 says the order in which things are finalized is
processor dependent. Page[131:22-24] also mention automatic
operations without an order. Does processor dependent allow
different images to do things differently?  Can
different images finalize things in different orders? I don’t
know if it matters in the co-array sense; but I don’t think we
say which it should be anyplace.

Are co-arrays expected to work on different kinds of hardware
in a network? It’s maybe reasonable to expect wildly different
hardware and OSs to have different memory management methods
and, maybe, to link things in different orders and do the
deallocate, or whatever, in a different order. Is this allowed
or prohibited?

Either way, I think some words in 2.3.2 would help.

For what it’s worth, many of the clause 13 collective
Functions say something like "processor-dependent and image-
dependent..."

For [130:15] Malcolm suggests saying it in only the correct
place and replacing the text with
"Deallocation of allocatable components can also occur during
intrinsic assignment (7.4.1.3)."