<br><tt><font size=2>j3-bounces@j3-fortran.org wrote on 11/06/2008 01:28:36
PM:<br>
<br>
> [image removed] </font></tt>
<br><tt><font size=2>> <br>
> (j3.2006) (SC22WG5.3633) [ukfortran] [Fwd: Preparing for the Tokyo
meeting]</font></tt>
<br><tt><font size=2>> <br>
> Bill Long </font></tt>
<br><tt><font size=2>> <br>
> Vectorization (either SSE or X2) is not an alternative to coarrays.
<br>
> They coexist and complement each other. SSE is still vectorization.
<br>
> And I would expect the length of the registers to get longer in the
<br>
> future as chip vendors try to boost performance at fixed clock rates.<br>
> <br>
> > b) Because of that, SSE optimisations are handled
by all compilers in<br>
> > similar ways to instruction scheduling, and not like true vectorisation,
as<br>
> > was used on the IBM 3090, Hitachi S-3600, many Fujitsus, almost
all Crays<br>
> > and so on.<br>
> ><br>
> > <br>
> <br>
> I can't speak for IBM, Hitachi, or Fujitsu, but at least I know now
you <br>
> are not aware of what happens in Cray's compiler.<br>
</font></tt>
<br>
<br><tt><font size=2>You certainly can't speak for IBM :-) And we
can discuss these issues during the Tokyo meeting. BTW I really lost
track on the topics discussed in this *LONG* thread of "Preparing
for the Tokyo meeting". But two points I was surprised to see:
1.) there are people assume compiler will only support coarray (i.e. abandon
serial Fortran) if coarrays are kept in F08. It's rather a disturbing
argument. 2.) I certainly don't see how vectorization replaces parallel
programming. Many Fortran programmers may have never used a vector
machine, but I'll be surprised if they never used a multi-processor machine.</font></tt>
<br>
<br><tt><font size=2>Cheers,</font></tt>
<br>
<br><font size=2 face="sans-serif">Jim Xia<br>
<br>
RL Fortran Compiler Test<br>
IBM Toronto Lab at 8200 Warden Ave, Markham, On, L6G 1C7<br>
Phone (905) 413-3444 Tie-line 313-3444<br>
email: jimxia@ca.ibm.com<br>
D2/YF7/8200 /MKM</font>
<br>