J3/06-231 To: J3 From: Bill Long Subject: C16 - UTI 75 : endian ordering Date: 28-jul-2006 --------------------- Unresolved Technical Issue 75 (page 497) suggests that the sentence "The ordering of these consecutive numeric storage units is processor dependent." at [497:8-9] needs additional explanation. A Note is suggested. Reply: This text is in the wrong subclause. It belongs in the storage sequence subclause (16.5.3.2). An edit is provided to fix that. A Note along the lines suggested is also provided. Edits: ------ [499:28+] Move the text at [497:7-11] to [499:28+] as list item (3) and renumber the subsequent items. (Note that at [499:35] the text "in items (1)-(6)", which is currently nonsense, will be correct once that item is renumbered as (7).) [499:37] Replace "of item (4)" with "of item (5)". [500:8+] Add a Note: Note 16.14a For a BITS value with a kind equal to an integer multiple of the size of a numeric storage unit, the order of its storage units may depend on the endian convention for the processor's memory. For example, on a system where the size of a numeric storage unit is 32 bits, BITS(32) :: X(2) BITS(64) :: Y, ZLE, XBE Y = z'0123456789abcdef' X = TRANSFER(Y, X) ZBE = X(1)//X(2) ZLE = X(2)//X(1) ! On some processors Y==ZLE and on other processors Y=ZBE. [end Note]